<small id="x2x16"></small>

    1. Open Positions

      Job Responsibility:

      Montage Technology has opened a new U.S. location in the Johns Creek, GA area offering a hybrid work environment. We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products. There will be many hands-on learning experiences with significant program ownership and career growth.

      Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing.


      • Validation: Develop and execute validation plans and test cases for DDR4 and DDR5 memory systems, ensuring compliance with industry standards. Validate memory component functionality, compatibility, and performance;
      • Interconnect: Evaluate memory system equalization techniques and transmission line characteristics to optimize signal integrity and data transfer rates;
      • Firmware and BIOS Development: Create firmware solutions to enhance memory system capabilities and compatibility;
      • Margining Algorithms: Develop and implement margining algorithms to ensure robust operation under various operating conditions;
      • Scripting and Programming: Utilize Python and C++ for test automation, firmware development, and data analysis to streamline validation processes;
      • Test Development: Collaborate with design and architecture teams to design and execute innovative tests that stress memory systems to their limits;
      • Data Analysis: Analyze validation results to identify and report issues, anomalies, and potential improvements in memory system performance;
      • Cross-functional Collaboration: Collaborate with hardware and software teams to address and resolve validation and performance issues, ensuring product readiness for market release.

      Job Qualification:


      • Bachelor's or Master’s degree in?electrical engineering or computer engineering;
      • Strong experience in DDR4 and DDR5 memory system validation;
      • 5+ years of relevant work experience;
      • Experience with signal integrity and equalization techniques;
      • Knowledge of DDR Training algorithms;
      • Proficiency in Python and C++ programming for test automation, firmware development, and data analysis;
      • Experience with memory controllers, firmware, and BIOS development is a strong plus;
      • Solid understanding of memory system architecture and industry standards;
      • Strong problem-solving skills and attention to detail;
      • Excellent communication and teamwork skills;
      • Experience in testing and validation methodologies;
      • Experience mentoring junior engineers.

      Apply

      Job Responsibility:


      • Participate ASIC digital verification for various IP/SoC projects;
      • Create verification plans with designers;
      • Develop DV architecture and verification environment;
      • Verification execution and sign-off.

      Job Qualification:


      • Excellent team working style;
      • Solid IP/SoC verification background;
      • Mass production for verified IP/SoC;
      • Bachelor with experiences on ASIC digital verification;
      • Production experiences on verification strategies and testplans;
      • Familiar with SystemVerilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;
      • Production experiences on ARM buses, such as AXI/AMBA/APB is a plus;
      • Familiar with verification tools;
      • Familiar with Linux, csh/Python or any script languages;
      • Good English skills (read and write).

      ?

      Apply

      Job Responsibility:

      Montage Technology has opened a new U.S. location in the Johns Creek, GA area offering a hybrid work environment. We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products. There will be many hands-on learning experiences with significant program ownership and career growth.

      Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing.

      We are looking for a Principal level Digital Design Engineer with over 15 years of experience who will help architect and develop RTL for various products with the area of focus being DDR server-class memory controllers. The ideal candidate will have RTL to GDSII flow experience using industry standard tools. In addition, knowledge of embedded micro-controllers such as RISCV and I2C/I3C protocols are advantageous. Your contribution would be to work with other global team members in designing both building blocks for the various products, as well as designing the entire new product for the company.


      • Mentor and lead cross functional teams to architect, develop and debug digital and mixed signal circuits;
      • Design various logic & state machines in SystemVerilog/Verilog RTL;
      • Develop and debug RTL, using industry-standard simulation and synthesis tools, along with LEC, CDC, Lint, DFT and STA tools;
      • Provide PPA (Power, Performance, Area) and schedule estimates, as well as design specifications for the RTL;
      • Coordinate with Verification/AMS design teams to ensure proper operation and functional and code coverage;
      • Provide floor-planning and support integration of digital & analog circuits at top level;
      • Work in cooperation with the methodology and CAD teams;
      • Coordinate with other stakeholders in identifying needs and improvements.

      Job Qualification:


      • Must have 15 years of industry experience;
      • Must have experience and deep understanding in the architecture definition of DDR4/5 server-class memory controllers;
      • Understand how to obtain minimum latency and maximum bandwidth;
      • Understand the tradeoff with command placement and scheduling, can efficiently manage activate and pre-charge commands;
      • Familiar with ECC (SECDEC) and CRC;
      • Knowledge of CHI/AXI interconnect and bus protocols;
      • Knowledge of JEDEC memory standards;
      • Experience in high speed and low power digital design in advanced deep sub-micron processes;
      • Proficient with SystemVerilog/Verilog RTL, for both behavioral simulations and synthesis;
      • Proficient with Design Compiler and PrimeTime;
      • Programming/scripting know-how, e.g. Perl, Tcl and/or Python;
      • Experience with Linux;
      • Good communication skills, ability to take ownership;
      • Experience with embedded micro-controllers is beneficial.

      ?

      Apply

      Job Responsibility:


      • Firmware, driver, Middleware library, complier or security algorithm development;
      • Unit test development and maintain;??
      • Document maintain;??
      • Troubleshoot, debug and maintain existing software;??
      • Performance tuning

      Job Qualification:


      • Bachelor or above degree in computer science or related technical field;??
      • Strong C/C++ programming ability;??
      • Familiar with Code development Toolchain under Linux;??
      • Self-motivated, good teamwork spirit and good communication skills;
      • Preferred Qualifications:???
        Familiar with x86 or RISC-V architecture is preferred;???
        Familiar with Linux driver development is preferred;???
        Script language such as Python ?is a plus;???
        Linux kernel knowledge is a plus.

      ?

      Apply

      Job Responsibility:

      Montage Technology has opened a new U.S. location in the Johns Creek, GA area offering a hybrid work environment. We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products. There will be many hands-on learning experiences with significant program ownership and career growth.

      Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing. In addition to our memory products, our portfolio also includes PCIe re-timers and CXL memory expanders.


      • Validation: develop and execute validation plans and test cases for PCIe and CXL system interfaces, ensuring compliance with industry standards. Validate PCIe and CXL functionality, compatibility, and performance;
      • Interconnect: evaluate interface equalization techniques and transmission line characteristics to optimize signal integrity and data transfer rates;
      • Scripting and programming: utilize Python and C++ for test automation and data analysis to streamline validation processes;
      • Test development: collaborate with design and architecture teams to design and execute innovative tests that stress the PCIe and CXL interfaces to their limits;
      • Data analysis: analyze validation results to identify and report issues, anomalies, and potential improvements in performance;
      • Cross-functional collaboration: collaborate with hardware and software teams to address and resolve validation and performance issues, ensuring product readiness for market release.

      Job Qualification:


      • Bachelor's or Master’s degree in?electrical engineering or computer engineering;
      • Strong experience in PCIe and CXL interface validation and debug;
      • 5+ years of relevant work experience;
      • Experience with signal integrity and equalization techniques;
      • Knowledge of PCIe/CXL training and protocol flows;
      • Proficiency in Python and C++ programming for test automation and data analysis.
      • Experience with firmware and BIOS development is a plus;
      • Solid understanding of server platform architecture and industry standards;
      • Strong problem-solving skills and attention to detail;
      • Excellent communication and teamwork skills;
      • Experience in testing and validation methodologies;
      • Experience mentoring junior engineers.

      ?

      Apply

      Job Responsibility:


      • Perform RTL to GDSII design flow, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, EM/IR;?
      • Perform Full chip DRC/LVS/ANT/DFM;?
      • Participate in next generation physical design, methodology and flow development.

      Job Qualification:


      • Bachelor degree or Master degree in Microelectronics;?
      • Be familiar with RTL to GDSII design flow;?
      • Be familiar with EDA tool;?
      • Successful track records of taping out complex, 65/40/28 nm SOC chips;?
      • Be familiar with Computer languages such as C, C++, perl/TCL/C-shell;?
      • Be familiar with DC、PT、FM、DFT;?
      • Self-motivated and good communication skills.

      Apply

      Job Responsibility:

      Montage Semiconductor, Inc., located at 3955 Johns Creek Ct., Suite 300, Suwanee, GA 30024, is seeking a Sr. Validation Engineer, responsible for engineering characterization and failure analysis of DDR or CXL hardware. The job duties include:


      1. Developing tools and methods for programming, training and validating DDR and CXL hardware;

      2. Conducing engineering characterization, customer support, and failure analysis of DDR or CXL hardware to understand its performance characteristics, designing and running experiments, analyzing data, and presenting the findings to other team members;
      3. Performing testing and validating early silicon against industry specifications, analyzing the performance and behavior of security, DDR, or CXL hardware to ensure that they meet the required specifications;
      4. Investigating and resolving issues identified during testing to identify the root cause of failures and work closely with design and development teams to find solutions;
      5. Evaluating the performance of DDR and CXL hardware by measuring data transfer rates, latency, power consumption, and other relevant parameters, and analyzing performance data and identify areas for improvement;

      6. Conducting failure analysis of system hardware to understand the roots of bugs and methods of preventions in the future system debugging, margin or training failures; and

      7. Maintaining detailed test plans, test reports, and documentation of validation procedures, and documenting any issues encountered, along with the steps taken to reproduce and resolve them.?Top of Form

      Job Responsibility:


      Require a Master of Science degree in Electrical Engineering, Electronics Engineering, or closely related field, plus two-year experience as Validation Engineer, or closely related. Require skills of Python, C, MATLAB, and LabView. Send resume to GAHR@montage-tech.com.

      ?

      Apply

      Job Responsibility:


      • Perform analog and mixed-signal physical design;
      • Perform layout verification (DRC, LVS);
      • Modify and verify in-house DRC & LVS command files.

      Job Qualification:


      • BS with experience in IC layout experience;?
      • Good understanding of basic electronic principles dealing with circuit and layout design;
      • Familiar with IC layout methodologies and flows;
      • Familiar with CAD tools such as Cadence virtuoso layout, PCELLs, Calibre physical verification;
      • Familiar with Calibre DRC & LVS command files;
      • Prior experience with stand-cell built is a plus.

      ?

      Apply

      Job Responsibility:


      • Help develop next generation of solutions for advanced memory interfaces of data centers;
      • Perform high speed SI simulation and analysis;
      • Extraction of channel model using standard industry tools;
      • Lab measurements of interconnect channel in frequency and time domains.

      Job Qualification:


      • MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;
      • Solid knowledge of Electromagnetic and Microwave;
      • Experience in high speed SI/PI simulation and analysis;
      • Mastering measurement tools like oscilloscope, VNA, TDR/TDT;
      • Knowledge of a programming or scripting language in a Windows/UNIX environment;
      • Excellent technical communication skills.

      ?

      Apply

      Job Description:

      Montage Semiconductor, Inc., located at 3955 Johns Creek Ct., Suite 300, Suwanee, GA 30024, is seeking a Sr. Software Engineer. The job duties include:


      1. Conducting engineering characterization and failure analysis of Security, DDR or CXL hardware;

      2. Designing and implementing software tools that generate and manage security certificates and certificate chains;?
      3. Developing software suites that can authenticate security certificates and certificate chains to ensure that they are valid, requiring a deep understanding of security protocols and cryptography;
      4. Analyzing the performance and behavior of security, DDR, or CXL hardware to ensure that they meet the required specifications;
      5. Performing engineering characterization of security hardware to understand its performance characteristics, designing and running experiments, analyzing data, and presenting the findings to other team members;
      6. Conducting failure analysis of security hardware to understand the roots of bugs and methods of preventions in the future; and
      7. Developing software and hardware solutions for DDR or CXL hardware applied on Montage’s products.

      Qualifications:


      Require a Master of Science degree or a foreign equivalent in Computer Science, Electrical Engineering or closely related, and two-year experience as software engineer, firmware engineer, or related occupation in software development, firmware development. Require experience in UEFI driver, and C/C++ and Python programming. Send resume to GAHR@montage-tech.com.

      ?

      Apply

      开心五月丁香六月激情综合,国产美女69拍拍视频观看,国产精品免费视频网站,lulu猪是国产的吗,国产欧美日韩免费一区,欧美神曲排行榜前十名
      <small id="x2x16"></small>